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BIT failure isolation
TM-9-1270-212-14-P Fire Control Subsystem Helmet Directed XM128 P/N 2277716-00 NSN 1270-00-122-9449 Manual
HSS Boresighting Theory. AH-lS(Mod)
TM 9-1270-212-14&P
eight inputs are high, U6-8 is low, and the low disables
high is connected to U1-5. At U1-5, the high has no
NAND gate U5: that is, a strobe pulse on U5-10 has no
immediate effect but is stored as a buffer-amplifier failure;
effect at U5-8. At counts Q0, Ql, Q6, and Q11, all eight
that is, the testing sequence continues. Assume also that the
gunner linkage is normal. At count Q6 (foldout FO-2), the
inputs are high and, as shown at A9-8 on the diagram, no
enable B pulses are generated. At counts Q2 through Q5
gunner linkage is connected for test. When the relay drive 5
signal energizes K1 on the Al0/Al5 card, it connects U9-6
and Q7 through Q10, one of the eight inputs is low, causing
to U7-13. When the enable A pulse provides the fourth
U6-8 to be high. The high at U5-9 enables U5-10, to cause a
change at U5-8. Thus, when the next four strobe pulses
enable, U9-6 goes low, and this low is connected to U7-13.
appear at U5-10, four negative-going pulses are generated at
U7-11 goes high, causing U7-3 to go low. The low at U7-3
U5-8; these pulses are inverted at U8-6 to become enable B
removes the high from the go latch not input connected
pulses. These pulses are shown at A9-8 on foldout FO-2.
through XA9-25 to A9U3-4. With U3-4 low, U3-6 goes
These four enable B pulses are used to check the four pilot
high; this high is connected through XA9-26 and
buffer amplifiers. If the gunner linkage outputs are
XA10/XA15-24 to U2-3, U2-2, and U1-4. The high has no
abnormal, four additional enable B pulses will be generated
effect at U2-3 and U2-2, but at U1-4, the high causes U1-6
to go low. The high at U3-6 turns on Q6, which energizes
in Iikc manner at counts Q7 through Q10 to test the four
gunner buffer amplifiers.
K5, K5, in turn, provides 28 volts to display an EIA failure.
The system remains inoperative in this condition until
power is momentarily removed to reset the circuitry;
(b) At count Q2, when U10-3 goes low, the low is
however, the BIT switch can be reactuate to repeat the
inverted to a high at U2-12, turning on Q1 to generate a
test as many times as desired without interrupting power.
low at XA9-17. As can be seen on foldout FO-4 or FO-5,
Actuating the BIT switch resets the circuitry, but if the
XA9-17 is connected to relays K1, K2, and K3 in buffer
failure remains, the failure indication will also remain. Note
amplifier A1 through J5-2. The relays energize and connect
that only one buffer-amplifier flip-flop is provided, the U4
the fixed inputs to buffer amplifier A1 and connect the
flip-flop, with inputs at pins 4, 5, 9, and 10. Thus, the
buffer-amplifier outputs to the test resolver, B1. The
circuitry provides the same EIA fail indication if a buffer
rest-resolver outputs (TR2 and TR3) are connected to the
comparator circuits on comparator card A11. The
amplifier fails, whether the buffer amplifier is associated
with the pilot or gunner linkage. This explains why an EIA
comparator outputs (TR2 and TR3 compensated outputs)
failure takes precedence over a linkage failure.
are connected to two inputs of three-input NAND gate
A101A15U9 at pins 12 and 13 through XA10/XA15-33 and
-35. The enable B signal is connected to U9-9 and -10. The
enable B signal is also connected to U6-10. The comparator
In the AH-1S(Mod) helicopter, the EIA fail in-
outputs, which enter on XA10/XAl5-35 and -33, are also
dicator is labeled INTFC; in the AH-1S heli-
connected to U6-12 and -13. If both inputs to U6-12 and
this indicator is labeled EIA
-13 are high, the low at U6-11, connected to U6-9, prevents
an enable B signal from affecting the high output at U6-8.
(e) Assume that both linkages are not in their BIT
(c) If buffer amplifier Al is normal and both
brackets at the time BIT in initiated. With a high from U9-6
comparator outputs are high, the enable B signal at
for both linkages and a high at U9-8 for all eight buffer
Al0/Al5U9-9 and -10 causes U9-8 to go low; this low is
amplifiers, the low at U7-8 inhibits the skip logic and also
connected to U5-1. The low at U5-1causes US-3 to go high,
inhibits a GO indication with a low at U2-9. The low at
and the high is connected as one enable to U2-5. The
U7-11 enables the decoder to continue operation. The highs
decoder continues to count, and, when U10-4 goes low, Q1
from all buffer amplifiers provide lows at U5-1 (pilot
cuts off and disconnects buffer amplifier Al, while Q2
b u f f e r - a m p l i f i e r logic) and at U5-13 (gunner
conducts and energizes the relays in buffer amplifier A3.
buffer-amplifier logic). The resulting high at U5-3 provides
The same sequence repeats for amplifier A3 at count Q3.
one enable at U2-5. The high at U5-11 provides one enable
at U2-13. With no buffer-amplifier failures, U4-8 remains
(d) Assume that the pilot linkage failed and that
low and the high at U1-6 provides a second enable at U2-1
one of the four buffer ampliilers is abnormal. When the
and at U2-4. At count Q11 (foldout FO-2), U10-13 on the
defective buffer amplifier is tested, one or both of the
A9 card goes low, causing U3-6 to go high. The high is
inputs at A10/Al5U9-12 and -13 will be low. The enable B
connected through XA9-26 and XA10/XA15-24 to U2-3,
signal will have no effect at U9-8, but the high at U6-11 will
U2-2, and U1-4. The high has no effect at U1-4 but it
enable U6-8 to go low when the enable B signal reaches
provides a third enable at U2-3 and U2-2, U2-6 and U2-12
U6-10. The low at U4-9 causes U4-8 to go high, and this
go low, and the low is inverted at U3-4 and U3-8.

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