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Figure 1-8. Simplified HSS,turret, and TSU block diagram
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TM-9-1270-212-14-P Fire Control Subsystem Helmet Directed XM128 P/N 2277716-00 NSN 1270-00-122-9449 Manual
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Figure 1-9. Typical HSS operating signals
TM 9-1270-212-14&P
respectively. The output of resolver B1 at J3-45 is
right, component; and the i signal is a reference signal
connected through J7-16 to channel 2 of buffer amplifier
representing the centerline of the helicopter. When the
A3 and to resolver B2. At the same time, the j signal from
turret is straight ahead at zero elevation, the k signal is 0
A14 is connected through J7-23 to channel 1 of buffer
volts, the i signal is 10 volts rms, and the j signal is 0 volts.
amplifier A3. The output of resolver B1 at J3-49 is
Turret movement up and to the left generates k and j signals
connected through J11-23 to channel 1 of buffer amplifier
that are in phase with the reference signal. Turret
A7 and to resolver B4. The output of resolver B2 at J3-44 is
movement to the right and down generates k and j signals
connected through J9-23 to channel 1 of buffer amplifier
that are out of phase with the reference signal.
A5 and to resolver B3. The output of resolver B2 at J3-48 is
connected through J9-16 to channem 2 of buffer amplifier
NOTE
A5 and to resolver B3. The output of resolver B3 at J3-43 is
connected through XA13-37 and amplifiers AR1 and AR2
Relays K1, K2, and K3 in the EIA are only
to XA13-33, and through relay K3 to J1-E as an azimuth
energized during HSS tests.
error signal. The output of resolver B3 at J3-47 is
connected through J11-16 to channel 2 of buffer amplifier
(4) This discussion applies only to the pilot linkage
A7 and to resolver B4. The output of resolver B4 at J3-46 is
and EIA in HSS XM 128. The k signal is connected through
connected through XA13-23 and arnplifiers AR5 and AR6
J1-A, BIT relay K1, and J5-16 to channel 2 of buffer
co XA13-13, and through relay K3 to J1-Z as an elevation
amplifier A1 in the EIA. The i signal is connected through
error signal. The output of resolver B4 at J3-42 is
J1-B, BIT relay K1 and J5-23 to channel 1 of buffer
connected through K3 to J1-s as the range correction signal.
amplifier A1. The k and i signals are then routed from
buffer omplifier A 1 to resolver B1 -S2 and -S1, respectively.
(6) The phase and amplitude shift of the operating
The output of resolver B1 at J3-45 is connected through
J7-16 to channel 2 of buffer amplifier a3 and to resolver
signals from linkage input to linkage output is shown in
B2. At the same time, the j signal is connected through
Figure 1-9. The signals of four typical turret positions are
provided across the top and resolver outputs for each
J1-C, BIT relay K1, and J7-23 to channel 1 of buffer
position are shown below. The linkage is positioned to look
amplifier A3. The output of resolver B1 at J3-49 is
straight ahead by placing the LOD on the rails and
connected through J11-23 to channel 1 of buffer amplifier
connecting the linkage steel fastener to the magnetic
A7 and to resolver B4. The output of resolver B2 at J3-44 is
receptacle on the LOD. Thus, as shown in the first vertical
connected through J9-23 to channel 1 of buffer amplifier
Column, with the turret pointing straight ahead, no error
A5 and to resolver B3. The output of resolver B2 at J3-48 is
signals are generated by resolvers B3 and B4 at TPl5 and
connected through J9-16 to channel 2 of buffer amplifier
P7 on A13. The second column depicts the waveforms
A5 and to resolver B3. The output of resolver B3 at J3-43 is
with the turret pointing 45 degrees left of center while the
connected through XA13-37 and amplifiers AR1 and AR2
linkage points straight ahead. Thus, an in-phase error signal
to XA13-33, and through relay K3 to J1-E as an azimuth
is generated by the linkage, as shown in the Al3TP15
error signal. The output of resolver B3 at J3-47 is
waveform. As the turret drives right in response to the error
connected through J11-16 to channel 2 of buffer amplifier
signal, the amplitude of the error signal decreases until the
A7 and to resolver B4. The output of resolver B4 at J3-46 is
turret is positioned straight ahead. At this position, the
connected through XA13-23 and amplifiers AR5 and AR6
Al3TP15 output is again a null. The third column depicts
to XA13-13, and through relay K3 to J1-Z as an elevation
the waveforms with the turret pointing 45 degrees right of
error signal. The output of resolver B4 at J3-42 is
center while the linkage points straight ahead. Thus, an
connected through K3 to J1-s as the range correction signal.
out-of-phase error signal is generated by the linkage, as
shown in the Al3TP15 waveform. As the turret drives left
(5) This discussion applies only to the pilot linkage
in response to the error signal, again the amplitude of the
and EIA in HSS XM136. The k signal is connected through
error signal decreases until the turret iS positioned straight
Jl-A, BIT relay K1, and J5-16 to channel 2 of buffer
ahead. The fourth column depicts the waveforms with the
amplifier Al. The i signal is connected through J1-B and
turret straight ahead and 45 degrees down while the linkage
BIT relay K1 to azimuth bias circuit card A14, and the j
remains straight ahead. Thus, an out-of-phase signal is
signal is connected through J1-C and BIT relay Kl to card
generated by the linkage, as shown in the Al3TP7
A14. Unity-gain, cross-coupled, operational amplifiers and
waveform. As the turret drives up in response to the error
trimming resistors in Al4A1 send out i apd j signals of the
signal, the amplitude of the error signal decreases until the
relative values indicated in note 2 on foldout FO-1. (For
turret is again positioned straight ahead. Thus, the linkage
the schematic of A14, see foldout FO-5, sheet 1.) The i
drives the turret into coincidence with the sight line
signal from Al4 is applied through J5-23 to channel 1 of
represented by the position of the steel fastener attached,
buffer amplifier Al. The k and i signals are then routed
during operation, to the helmet magnetic receptacle.
from buffer amplifier Al to resolver B1-S2 and -S1,
1-15

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