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Sonalert - TM-5-6350-262-14-50034
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TM-5-6350-262-14-5 Control Unit Alarm Set C-9412( )/FSS-9 (V) (6350-228-2735) Manual
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Instantaneous Alarm Output
TM 5-6350-262-14/5
NAVELEX 0967-466-9050
TO 31S9-4-38-1
is applied to the alarm identification latching circuit through
switch S3 is at SECURE. In the secure mode, +20 volts dc
connector pin J11-8. The exit time delay is adjustable from 10
from pin 2-3 of operating mode switch S3 is applied to the coil
f 2 to 90 f 10 seconds by means of potentiometer A9R6.
of relay A10K3 through connector pin J10-H.  With relay
These two input conditions (20 volts and 0 volts) reset each
A10K3 operated the 5 volts dc no-alarm signal normally
latch for the six LED's. All illuminated LED's are then turned
present at connector pin J10-4 drops to less than 1 volt for an
off. The latch reset condition inhibits a set condition caused
alarm signal. From J10-4, the audible alarm signal is routed
by a subsequent alarm input signal until the exit time delay
through operating mode switch S3 (pin 3-3 to 3-4), through
expires.  At the end of the time delay, the exit time delay
normally closed contacts of relay A10K4 (pin J10-11 to -R),
display reset output goes to 20 volts dc and removes the reset
and out to terminal board L2-1.  The audible alarm output
condition on the alarm identification latching circuitry.  The
signal will continue until the signal is unlatched by turning
alarm identification and display circuits are then ready to
operating mode switch S3 to TEST/RESET. The position of
receive an alarm signal on any of the six inputs.
LATCH/NON LATCH switch S5 has no affect on the audible
alarm output.
6-7. Tamper/DC Voltage Alarm Circuit
6-6. Duress and Intrusion Alarm Identification
a. General. Tamper signals may be received at the control
unit from Latching Alarm Switch CA1954( )/FSS-9(V)
a. Alarm
(duress), from up to five intrusion detection sensors, an
automatic telephone dialer, Audible Alarm BZ-204( )/FSS-9(V)
(1) Alarm identification module All and display
or from the control unit enclosure itself (switch S4).  The
module A12 monitor and indicate which duress or intrusion
power supply 20-volt dc output is also monitored for high or
alarm input signal caused a control unit alarm output. The
low voltage and treated as a tamper alarm.
first alarm input to occur after the circuit is set will illuminate
the light emitting diode (LED) associated with its alarm input
circuit. If the first alarm input is followed within 1 second or
b. Input. From the input terminal boards, tamper signals are
less by additional intrusion or duress alarms, the LED's
applied to pin 12 of alarm/tamper modules Al through A6 and
associated with these alarm inputs may also illuminate.
to J7 pins 4, 7, and 14 of voltage monitor module A7. The 20
However, after a maximum of 1 second has elapsed from the
volts de at connector pin J7-10 provides module A7 circuitry
time of the first alarm input, the identification and display
with operating power and is monitored for high or low voltage.
circuitry will be disabled and subsequent alarm inputs will be
Operation of modules Al through A7 is almost identical for
ignored.
processing tamper signals.  An impedance of 0 to 20,000
ohms on all input lines except L2-3 is processed as a no-
(2) Each of the duress and sensor intrusion alarm
alarm signal. An impedance greater than 100,000 ohms is
identification and display circuits are identical; the duress
processed as a tamper alarm.  Less than 1 volt between
alarm signal is used in the following circuit explanation.
terminals L2-3 and -2 is used as an alarm signal from the
audible alarm. From 1 to 5 volts is processed as a no-alarm
(3) Duress alarm signals (20 volts dc) are applied to
signal input. A no-alarm will result in approximately 0 volts dc
alarm identification module All through connector pin Jl1-16.
output;  a  tamper  alarm  input  signal  will  result,  in
The input signal initiates the 1second timer (para. (1) ) and
approximately 20 volts dc output. If the regulated +20 volts dc
sets the latch for duress alarm LED CR1. The latched circuit
input at connector pin J7-10 varies more than i 1 volt, voltage
provides a return path for the 20 volts dc applied to the anode
monitor module A7 puts out a 20 volt alarm signal on the
of LED CR1 from connector pin Jl1-17.  An alarm will be
tamper line. The tamper signal output of modules Al through
displayed with operating mode switch S3 at ACCESS or
A6 can be measured between test point TP2 and ground.
TEST/RESET, and at SECU RE position providing the egress
Control unit tamper outputs and automatic telephone dialer
time delay circuit has timed out. Duress alarm LED CR1 will
outputs are measured at test points A7TP1 and A7TP2
remain on until the latching circuit is reset (para b).
respectively. Tamper and voltage monitor signals from pin 18
of each jack of modules. A1 through A7 are tied together to
form a common tamper alarm buss. Tamper signals (O to 20
b. Alarm Reset. When operating mode switch S3 is turned to
volts dc) on the tamper buss are fed to connector pins J9-10
SECURE, 20 volts dc is applied to the alarm identification
and to J10-7 (by way of audible alarm module AS, pins J-11
latching circuit through connector pin Jll-10 and to the exit
to -8) for instantaneous and latched alarm outputs. These
time delay circuit through connector pin J9-13. The display
reset signal (0 volts dc) output from the exit time delay circuit
6-5

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