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Simulated Forced Penetration Test
TM-5-6350-262-14-2 Processor Passive Signal Ultrasonic MX-9443( )/FSS-9(V) FSN 6350-228-2548 Receiver Passive Signal Ultrasonic Manual
Enclosure Installation - TM-5-6350-262-14-20016
TM 5-6350-262-14/2
NAVELEX  0967-LP-466-9021
TO 3159-4-35-1, Chg 1
(4) Set the multimeter (AN/USM-210) to
read only the a.c. value of voltage. If not take
read D.C. and the range selector switch to 50 Vdc.
voltage measurements through a 0.5 microfarad
or greater value capacitor.
c. Location Test. The receiver location is now
ready to be checked for adequate detection cover-
(b) Measure the voltage at test point TP2
age and SENSITIVITY control settings of the
on the signal processor. Measured voltage should
be no greater than 0.3 volts rms.
(1) Apply power to the processor and allow
(c) If measured voltage is greater than 0.3
to stabilize for approximately 30 seconds.
volts rms the ambient ultrasonic energy level is
too high. Attempt to reduce the level by installing
ultrasonic baffles (refer to TM 5-6350-262-
Each time power is applied to the proces-
14/14) over all ventilation and air conditioning
sor a stabilizing period of approximately
vents. Inspect for cracks in floors, walls, around
30 seconds must elapse before proceeding
doors and windows, and in other locations where
with tests or observations. If a proces-
the flow of air or the wind may generate ultra-
sor/transceiver ultrasonic motion signal
sonic energy. Caulk the cracks in floors, walls,
is installed in the same location, tempo-
and around window and door frames. Install or
rarily disable the ultrasonic motion sig-
replace, as appropriate, the weather stripping
nal equipment while performing this test.
around doors and windows. If the measured volt-
age cannot be reduced below 0.3 volts rms the
(2) Simulate a condition representing a
receiver should be relocated and the simulated
forced penetration using a wideband ultrasonic
forced penetration test repeated. It may be neces-
generator (WUSG-100) in accordance with its
sary to settle for a reduced area of coverage (and
instruction manual) throughout the area of ex-
a reduced SENSITIVITY setting). If such is the
pected entry. The simulator gives a 6-second
case it will probably be necessary to plan for
signal each time it is activated. Detection is indi-
additional receivers in the system with some
cated on the multimeter by a rising voltage to
receivers having smaller areas of coverage than
a level of 11 Vdc and remaining at 11 Vdc for
originally planned for.
the full 6-second interval. After approximately
(6) Preliminary adjustments are complete
4.5 seconds of the 6-second interval, the audible
after location testing of all receivers, and record-
sounder is actuated.
ing respective processor SENSITIVITY control
settings for each location. The highest processor
SENSITIVITY control setting recorded during
After each simulated forced penetration
the preliminary adjustments will be the final
attempt the timing circuit must be reset
setting after the permanent installation and inter-
by jumpering the INT test point to signal
ground (terminal 8 of TB1). Failure to
(7) Disconnect the test setup and retain the
do so will cause the integrator charge to
fabricated cables for possible reuse during bench
be unrelated to a particular simulated
troubleshooting  procedures.
penetration signal.
d. Processor/Receiver Ultrasonic Passive Signal
Test. Following the individual test of each re-
(3) If a simulated forced penetration is de-
ceiver location (independent of other receiver
tected, identify the receiver location and record
locations) a test of all receivers (temporarily
the processor SENSITIVITY control setting for
interconnected) must be performed. This test
that location and proceed to the next receiver
evaluates the operation with all receivers con-
location and repeat the above procedure until all
nected and verifies the GAIN levels of each re-
locations have been tested.
ceiver in relation to the SENSITIVITY level of
(4) If a simulated forced penetration is not
the processor.
detected, advance the processor SENSITIVITY
(1) Locate the test setup (fig. 2-3) at the
control to the next higher setting (that is, from
proposed site of the processor permanent position.
1 to 2, 2 to 3, 3 to 4, etc.) and repeat (2) and (3)
(2) Temporarily interconnect all receivers
above for each higher control setting.
to the processor as shown in the test setup (fig.
(5) Perform a noise test as follows :
2-3). Careful consideration of the temporary
(a) Set the multimeter (AN/USM-210 or
wire run lengths in regard to the proposed perma-
equivalent) to read a.c. Insure that the meter will
Change 1

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